1. Field of the Disclosure
The present disclosure relates to static random access memory (SRAM) circuits in general and in particular to low power write assist techniques for SRAM circuits.
2. Description of the Related Art
Static random access memory (SRAM) is often included in very large scale integration VLSI system-on-chip (SoC) applications. The size of the SRAM circuit has a significant impact on the overall size of an integrated circuit for such applications. Therefore, there is a need to keep the size of SRAM circuits small. Furthermore, there is a trend towards reducing operation supply voltage of these integrated circuits. Reliability of the SRAM circuits reduces as supply voltages are reduced due to variations in circuit characteristics such as threshold voltages of transistors. Write assist schemes are used for improving the reliability of writes to SRAM circuits used for low power applications. These write assist schemes often result in increase in dynamic power consumption of the SRAM circuits and also increase area of the circuit.